Implement NRST
authorNIIBE Yutaka <gniibe@fsij.org>
Tue, 26 Apr 2016 07:17:02 +0000 (16:17 +0900)
committerNIIBE Yutaka <gniibe@fsij.org>
Tue, 26 Apr 2016 07:17:28 +0000 (16:17 +0900)
0002-Fix-size-bits-bytes.patch [new file with mode: 0644]
0003-Implement-use-of-NRST.patch [new file with mode: 0644]
pru-swd.p

diff --git a/0002-Fix-size-bits-bytes.patch b/0002-Fix-size-bits-bytes.patch
new file mode 100644 (file)
index 0000000..7c40d24
--- /dev/null
@@ -0,0 +1,42 @@
+From 3dd1bf328e6f222eb7b6a227598c24bd7f9ee8bb Mon Sep 17 00:00:00 2001
+From: NIIBE Yutaka <gniibe@fsij.org>
+Date: Tue, 26 Apr 2016 05:22:28 +0000
+Subject: [PATCH 2/3] Fix size (bits->bytes)
+
+---
+ src/jtag/drivers/bbg-swd.c | 10 +++++-----
+ 1 file changed, 5 insertions(+), 5 deletions(-)
+
+diff --git a/src/jtag/drivers/bbg-swd.c b/src/jtag/drivers/bbg-swd.c
+index 0363f45..f4fd20b 100644
+--- a/src/jtag/drivers/bbg-swd.c
++++ b/src/jtag/drivers/bbg-swd.c
+@@ -186,20 +186,20 @@ static int bbg_swd_switch_seq(enum swd_special_seq seq)
+       case LINE_RESET:
+               LOG_DEBUG("SWD line reset");
+               pru_data_ram[0] = CMD_SIG_GEN | (swd_seq_line_reset_len << 8);
+-              memcpy (&pru_data_ram[1], swd_seq_line_reset, swd_seq_line_reset_len);
++              memcpy (&pru_data_ram[1], swd_seq_line_reset, (swd_seq_line_reset_len+7)/8);
+               pru_request_cmd(pru_data_ram);
+               break;
+       case JTAG_TO_SWD:
+               LOG_DEBUG("JTAG-to-SWD");
+-              pru_data_ram[0] = CMD_SIG_GEN | (swd_seq_jtag_to_swd_len << 8);
+-              memcpy (&pru_data_ram[1], swd_seq_jtag_to_swd, swd_seq_jtag_to_swd_len);
++              pru_data_ram[0] = CMD_SIG_GEN | ((swd_seq_jtag_to_swd_len)<< 8);
++              memcpy (&pru_data_ram[1], swd_seq_jtag_to_swd, (swd_seq_jtag_to_swd_len+7)/8);
+               pru_request_cmd(pru_data_ram);
+               bbg_swd_idle(8);
+               break;
+       case SWD_TO_JTAG:
+-              LOG_DEBUG("JTAG-to-SWD");
++              LOG_DEBUG("SWD-to-JTAG");
+               pru_data_ram[0] = CMD_SIG_GEN | (swd_seq_swd_to_jtag_len << 8);
+-              memcpy (&pru_data_ram[1], swd_seq_swd_to_jtag, swd_seq_swd_to_jtag_len);
++              memcpy (&pru_data_ram[1], swd_seq_swd_to_jtag, (swd_seq_swd_to_jtag_len+7)/8);
+               pru_request_cmd(pru_data_ram);
+               break;
+       default:
+-- 
+2.1.4
+
diff --git a/0003-Implement-use-of-NRST.patch b/0003-Implement-use-of-NRST.patch
new file mode 100644 (file)
index 0000000..06af25b
--- /dev/null
@@ -0,0 +1,55 @@
+From c368c7f22b67ba3ce5034d0f66911b5df4dc3861 Mon Sep 17 00:00:00 2001
+From: NIIBE Yutaka <gniibe@fsij.org>
+Date: Tue, 26 Apr 2016 07:14:55 +0000
+Subject: [PATCH 3/3] Implement use of NRST
+
+---
+ src/jtag/drivers/bbg-swd.c | 18 ++++++++++--------
+ 1 file changed, 10 insertions(+), 8 deletions(-)
+
+diff --git a/src/jtag/drivers/bbg-swd.c b/src/jtag/drivers/bbg-swd.c
+index f4fd20b..8158f5e 100644
+--- a/src/jtag/drivers/bbg-swd.c
++++ b/src/jtag/drivers/bbg-swd.c
+@@ -104,11 +104,7 @@ static int bbg_swd_close(void)
+ }
+-static int bbg_swd_gpio_srst(int on)
+-{
+-      /* XXX: not yet implemented */
+-      return ERROR_OK;
+-}
++static void bbg_swd_gpio_srst(int on);
+ static bool swd_mode;
+@@ -125,9 +121,7 @@ static int bbg_swd_interface_init(void)
+       if (jtag_reset_config & RESET_CNCT_UNDER_SRST) {
+               if (jtag_reset_config & RESET_SRST_NO_GATING) {
+-                      retval = bbg_swd_gpio_srst(0);
+-                      if (retval != ERROR_OK)
+-                              return ERROR_FAIL;
++                      bbg_swd_gpio_srst(0);
+                       LOG_INFO("Connecting under reset");
+               }
+       }
+@@ -178,6 +172,14 @@ static void bbg_swd_idle(int count)
+       pru_request_cmd(pru_data_ram);
+ }
++static void bbg_swd_gpio_srst(int signal)
++{
++      pru_data_ram[0] = CMD_GPIO_OUT;
++      pru_data_ram[1] = (1 << 15);
++      pru_data_ram[2] = signal ? 1 : 0;
++      pru_request_cmd(pru_data_ram);
++}
++
+ static int bbg_swd_switch_seq(enum swd_special_seq seq)
+ {
+       LOG_DEBUG("bbg_swd_switch_seq");
+-- 
+2.1.4
+
index 2b31f7e..f219918 100644 (file)
--- a/pru-swd.p
+++ b/pru-swd.p
@@ -34,7 +34,7 @@
 
 
 #define PRU0_ARM_INTERRUPT     19
-#define ARM_PRU0_INTERRUPT      21
+#define ARM_PRU0_INTERRUPT     21
 
 // Constant Table
 #define CT_PRUCFG      C4
@@ -55,6 +55,7 @@
 // P8_11 GPIO1_13 GPIO_45 SWD_DIO
 // P8_12 GPIO1_12 GPIO_44 SWD_CLK
 // P8_15 GPIO1_15 GPIO_47 nRST
+#define SWD_NRST_BIT 15
 #define SWD_DIO_BIT 13
 #define SWD_CLK_BIT 12
 #define SWD_DIO (1<<SWD_DIO_BIT)
@@ -133,11 +134,14 @@ START:
        LDI     r6, #SWD_DIO
        LDI     r7, #SWD_CLK
 
-       // Initialize SWD_DIO and SWD_CLK pins
+       // Initialize NRST, SWD_DIO and SWD_CLK pins
        DRIVE_DIO_HIGH
        DRIVE_CLK_HIGH
-       // SWD_DIO_oe <= Output, SWD_CLK_oe <= Output
+       // NRST_oe <= Output
+       // SWD_DIO_oe <= Output
+       // SWD_CLK_oe <= Output
        LBBO    r0, r5, GPIO_OE, 4
+       CLR     r0, SWD_NRST_BIT
        CLR     r0, SWD_DIO_BIT
        CLR     r0, SWD_CLK_BIT
        SBBO    r0, r5, GPIO_OE, 4