PRU-SWD: improve SIG_GEN.
authorNIIBE Yutaka <gniibe@fsij.org>
Mon, 21 Mar 2016 08:42:47 +0000 (17:42 +0900)
committerNIIBE Yutaka <gniibe@fsij.org>
Mon, 21 Mar 2016 08:42:47 +0000 (17:42 +0900)
* SIG_GEN: 12-cycle generation.

pru-swd.p

index dae7685..ced67bb 100644 (file)
--- a/pru-swd.p
+++ b/pru-swd.p
@@ -281,30 +281,34 @@ SIG_GEN:
        MOV     r1.b0, &r16
        LDI     r2, #1
        MVID    r3, *r1.b0++
-L_SIG_GEN:
-       AND     r4, r2, r3
+L_GEN_LOOP:
+       SUB     r0, r0, 1
        LSL     r2, r2, 1
-       QBNE    L_GEN_BIT1, r4, 0
+       QBBS    L_GEN_BIT1, r3.t0
+       LSR     r3, r3, 1
+       DRIVE_CLK_LOW
        DRIVE_DIO_LOW
        QBA     L_GEN_BIT_DONE
+       //
+L_NO_LOAD:
+       NOP
+       QBA     L_NEXT_BIT
+       //
 L_GEN_BIT1:
+       LSR     r3, r3, 1
+       DRIVE_CLK_LOW
        DRIVE_DIO_HIGH
        NOP
 L_GEN_BIT_DONE:
-       DRIVE_CLK_LOW
        //
-       SUB     r0, r0, 1
-       QBNE    L_SKIP, r2, 0
+       QBNE    L_NO_LOAD, r2, 0
        MVID    r3, *r1.b0++
        LDI     r2, #1
+L_NEXT_BIT:
        DRIVE_CLK_HIGH
-       QBNE    L_SIG_GEN, r0, 0
-L_SKIP:
-       NOP     
-       NOP     
-       DRIVE_CLK_HIGH
-       QBNE    L_SIG_GEN, r0, 0
+       QBNE    L_GEN_LOOP, r0, 0
        //
+L_SIG_GEN_DONE:
        LDI     r0, #0
        SBCO    r0, CT_PRUDRAM, 64, 4
        //
@@ -461,7 +465,7 @@ READ_REG:
 L_SKIP_IDLE_R:
        // RETURN: Parity|Ack, Value
        SBCO    r3, CT_PRUDRAM, 64, 8
-       JMP     COMMAND_DONE
+       QBA     COMMAND_DONE
 
 //
 //     WRITE_REG - execute WRITE_REG transaction