Add 0002-minor-tweak-for-BBG-SWG.patch and update status
authorNIIBE Yutaka <gniibe@fsij.org>
Thu, 24 Mar 2016 16:02:51 +0000 (01:02 +0900)
committerNIIBE Yutaka <gniibe@fsij.org>
Thu, 24 Mar 2016 16:02:51 +0000 (01:02 +0900)
0001-initial-patch-for-BBG-SWD.patch
0002-minor-tweak-for-BBG-SWG.patch [new file with mode: 0644]
STATUS-2016-03-22
STATUS-2016-03-24 [new file with mode: 0644]

index 87b3c82..f8586ff 100644 (file)
@@ -1,7 +1,7 @@
 From ee1d60eba7f9c35571241c1da4c8175c8b98daa1 Mon Sep 17 00:00:00 2001
 From: NIIBE Yutaka <gniibe@fsij.org>
 Date: Tue, 22 Mar 2016 03:06:37 +0000
-Subject: [PATCH] initial patch for BBG-SWD
+Subject: [PATCH 1/2] initial patch for BBG-SWD
 
 ---
  configure.ac                 |  13 ++
diff --git a/0002-minor-tweak-for-BBG-SWG.patch b/0002-minor-tweak-for-BBG-SWG.patch
new file mode 100644 (file)
index 0000000..8cb9df3
--- /dev/null
@@ -0,0 +1,25 @@
+From a05ed40182c57aa43970cc8ffb7095076a266289 Mon Sep 17 00:00:00 2001
+From: NIIBE Yutaka <gniibe@fsij.org>
+Date: Thu, 24 Mar 2016 15:44:06 +0000
+Subject: [PATCH 2/2] minor tweak for BBG-SWG
+
+---
+ src/target/cortex_m.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/src/target/cortex_m.c b/src/target/cortex_m.c
+index 6786c46..c14d760 100644
+--- a/src/target/cortex_m.c
++++ b/src/target/cortex_m.c
+@@ -1908,7 +1908,7 @@ int cortex_m_examine(struct target *target)
+               }
+               /* Leave (only) generic DAP stuff for debugport_init(); */
+-              armv7m->debug_ap->memaccess_tck = 8;
++              armv7m->debug_ap->memaccess_tck = 32;
+               retval = mem_ap_init(armv7m->debug_ap);
+               if (retval != ERROR_OK)
+-- 
+2.1.4
+
index a541b15..bdbbbc9 100644 (file)
@@ -1,3 +1,6 @@
+We can avoid this failure by 0002-minor-tweak-for-BBG-SWG.patch.
+It seems it's timing issue.
+
 ========================
 2016-03-22 10:00
 
diff --git a/STATUS-2016-03-24 b/STATUS-2016-03-24
new file mode 100644 (file)
index 0000000..aefeed4
--- /dev/null
@@ -0,0 +1,4 @@
+Access to ARM core (register read/write) works.
+
+Access to memory fails.
+Because of this, identification of MCU fails.