Added "CQ STARM" target.
authorNIIBE Yutaka <gniibe@fsij.org>
Wed, 20 Oct 2010 01:14:03 +0000 (10:14 +0900)
committerNIIBE Yutaka <gniibe@fsij.org>
Wed, 20 Oct 2010 01:14:03 +0000 (10:14 +0900)
ChangeLog
boards/CQ_STARM/board.c [new file with mode: 0644]
boards/CQ_STARM/board.h [new file with mode: 0644]
boards/CQ_STARM/board.mk [new file with mode: 0644]
boards/CQ_STARM/mcuconf.h [new file with mode: 0644]
src/configure

index 72348d2..4ef674d 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,11 @@
+2010-10-20  NIIBE Yutaka  <gniibe@fsij.org>
+
+       * src/configure: Added CQ STARM target.
+       * boards/CQ_STARM/mcuconf.h: New.
+       * boards/CQ_STARM/board.mk: New.
+       * boards/CQ_STARM/board.h: New.
+       * boards/CQ_STARM/board.c: New.
+
 2010-10-19  NIIBE Yutaka  <gniibe@fsij.org>
 
        * boards/STM32_PRIMER2/board.mk (BOARDSRC): Use common/hw_config.c.
diff --git a/boards/CQ_STARM/board.c b/boards/CQ_STARM/board.c
new file mode 100644 (file)
index 0000000..a993963
--- /dev/null
@@ -0,0 +1,36 @@
+#include "config.h"
+#include "ch.h"
+#include "hal.h"
+
+#include "../common/hwinit.c"
+
+void
+hwinit0 (void)
+{
+  hwinit0_common ();
+}
+
+void
+hwinit1 (void)
+{
+  hwinit1_common ();
+}
+
+void
+USB_Cable_Config (FunctionalState NewState)
+{
+  /* CQ STARM has no functionality to stop USB.  */
+  /*
+   * It seems that users can add the functionality with USB_DC (PD9)
+   * though
+   */
+}
+
+void
+set_led (int value)
+{
+  if (value)
+    palClearPad (IOPORT3, GPIOC_LED);
+  else
+    palSetPad (IOPORT3, GPIOC_LED);
+}
diff --git a/boards/CQ_STARM/board.h b/boards/CQ_STARM/board.h
new file mode 100644 (file)
index 0000000..9d001d2
--- /dev/null
@@ -0,0 +1,149 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+                                      ---
+
+    A special exception to the GPL can be applied should you wish to distribute
+    a combined work that includes ChibiOS/RT, without being obliged to provide
+    the source code for any proprietary components. See the file exception.txt
+    for full details of how and when the exception can be applied.
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+/*
+ * Setup for the CQ STARM board.
+ */
+
+/*
+ * Board identifier.
+ */
+#define BOARD_CQ_STARM
+#define BOARD_NAME "CQ STARM"
+
+/*
+ * Board frequencies.
+ */
+#define STM32_LSECLK            32768
+#define STM32_HSECLK            8000000
+
+/*
+ * MCU type, this macro is used by both the ST library and the ChibiOS/RT
+ * native STM32 HAL.
+ */
+#define STM32F10X_MD
+
+/*
+ * IO pins assignments.
+ */
+#define GPIOC_LED               6
+
+#if 0
+#define GPIOA_BUTTON            0
+#define GPIOA_SPI1NSS           4
+
+#define GPIOB_SPI2NSS           12
+#define GPIOC_MMCWP             6
+#define GPIOC_MMCCP             7
+#define GPIOC_CANCNTL           10
+#define GPIOC_DISC              11
+#endif
+
+/*
+ * I/O ports initial setup, this configuration is established soon after reset
+ * in the initialization code.
+ *
+ * The digits have the following meaning:
+ *   0 - Analog input.
+ *   1 - Push Pull output 10MHz.
+ *   2 - Push Pull output 2MHz.
+ *   3 - Push Pull output 50MHz.
+ *   4 - Digital input.
+ *   5 - Open Drain output 10MHz.
+ *   6 - Open Drain output 2MHz.
+ *   7 - Open Drain output 50MHz.
+ *   8 - Digital input with PullUp or PullDown resistor depending on ODR.
+ *   9 - Alternate Push Pull output 10MHz.
+ *   A - Alternate Push Pull output 2MHz.
+ *   B - Alternate Push Pull output 50MHz.
+ *   C - Reserved.
+ *   D - Alternate Open Drain output 10MHz.
+ *   E - Alternate Open Drain output 2MHz.
+ *   F - Alternate Open Drain output 50MHz.
+ * Please refer to the STM32 Reference Manual for details.
+ */
+
+/*
+ * Port A setup.
+ * Everything input with pull-up except:
+ * PA4  - Normal input      (ADC_IN4 : VoutX of LIS344ALH).
+ * PA5  - Alternate output  (MMC SPI1 SCK).
+ * PA6  - Normal input      (MMC SPI1 MISO).
+ * PA7  - Alternate output  (MMC SPI1 MOSI).
+ * PA11 - (USBDM)
+ * PA12 - (USBDP)
+ */
+#define VAL_GPIOACRL            0xB4B48888      /*  PA7...PA0 */
+#define VAL_GPIOACRH            0x88888888      /* PA15...PA8 */
+#define VAL_GPIOAODR            0xFFFFFFFF
+
+/*
+ * Port B setup.
+ * Everything input with pull-up except:
+ * PB13 - Alternate output  (MMC SPI2 SCK).
+ * PB14 - Normal input      (MMC SPI2 MISO).
+ * PB15 - Alternate output  (MMC SPI2 MOSI).
+ */
+#define VAL_GPIOBCRL            0x88888888      /*  PB7...PB0 */
+#define VAL_GPIOBCRH            0xB4B88888      /* PB15...PB8 */
+#define VAL_GPIOBODR            0xFFFFFFFF
+
+/*
+ * Port C setup.
+ * Everything input with pull-up except:
+ * PC4  - Normal input      (ADC_IN14 : VoutY of LIS344ALH).
+ * PC5  - Normal input      (ADC_IN15 : VoutZ of LIS344ALH).
+ * PC6  - Push Pull output (LED).
+ * (PC9  - SDCard CD)
+ * (PC12 - SDCard CS)
+ * PC14 - Normal input (XTAL).
+ * PC15 - Normal input (XTAL).
+ */
+#define VAL_GPIOCCRL            0x83448888      /*  PC7...PC0 */
+#define VAL_GPIOCCRH            0x44888888      /* PC15...PC8 */
+#define VAL_GPIOCODR            0xFFFFFFFF
+
+/*
+ * Port D setup.
+ * Everything input with pull-up except:
+ * (PD9 - USB_DC)
+ */
+#define VAL_GPIODCRL            0x88888888      /*  PD7...PD0 */
+#define VAL_GPIODCRH            0x88888888      /* PD15...PD8 */
+#define VAL_GPIODODR            0xFFFFFFFF
+
+/*
+ * Port E setup.
+ * Everything input with pull-up except:
+ */
+#define VAL_GPIOECRL            0x88888888      /*  PE7...PE0 */
+#define VAL_GPIOECRH            0x88888888      /* PE15...PE8 */
+#define VAL_GPIOEODR            0xFFFFFFFF
+
+#endif /* _BOARD_H_ */
diff --git a/boards/CQ_STARM/board.mk b/boards/CQ_STARM/board.mk
new file mode 100644 (file)
index 0000000..d15f7db
--- /dev/null
@@ -0,0 +1,6 @@
+# List of all the board related files.
+BOARDSRC = ../boards/CQ_STARM/board.c \
+       ../boards/common/hw_config.c
+
+# Required include directories
+BOARDINC = ../boards/CQ_STARM
diff --git a/boards/CQ_STARM/mcuconf.h b/boards/CQ_STARM/mcuconf.h
new file mode 100644 (file)
index 0000000..c862cf9
--- /dev/null
@@ -0,0 +1,107 @@
+/*
+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010 Giovanni Di Sirio.
+
+    This file is part of ChibiOS/RT.
+
+    ChibiOS/RT is free software; you can redistribute it and/or modify
+    it under the terms of the GNU General Public License as published by
+    the Free Software Foundation; either version 3 of the License, or
+    (at your option) any later version.
+
+    ChibiOS/RT is distributed in the hope that it will be useful,
+    but WITHOUT ANY WARRANTY; without even the implied warranty of
+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+    GNU General Public License for more details.
+
+    You should have received a copy of the GNU General Public License
+    along with this program. If not, see <http://www.gnu.org/licenses/>.
+
+                                      ---
+
+    A special exception to the GPL can be applied should you wish to distribute
+    a combined work that includes ChibiOS/RT, without being obliged to provide
+    the source code for any proprietary components. See the file exception.txt
+    for full details of how and when the exception can be applied.
+*/
+
+/*
+ * STM32 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 15...0       Lowest...Highest.
+ *
+ * DMA priorities:
+ * 0...3        Lowest...Highest.
+ */
+
+/*
+ * HAL driver system settings.
+ */
+#define STM32_SW                    STM32_SW_PLL
+#define STM32_PLLSRC                STM32_PLLSRC_HSE
+#define STM32_PLLXTPRE              STM32_PLLXTPRE_DIV1
+#define STM32_PLLMUL_VALUE          9
+#define STM32_HPRE                  STM32_HPRE_DIV1
+#define STM32_PPRE1                 STM32_PPRE1_DIV2
+#define STM32_PPRE2                 STM32_PPRE2_DIV2
+#define STM32_ADCPRE                STM32_ADCPRE_DIV4
+#define STM32_MCO                   STM32_MCO_NOCLOCK
+
+/*
+ * ADC driver system settings.
+ */
+#define USE_STM32_ADC1              TRUE
+#define STM32_ADC1_DMA_PRIORITY     3
+#define STM32_ADC1_IRQ_PRIORITY     5
+#define STM32_ADC1_DMA_ERROR_HOOK() chSysHalt()
+
+/*
+ * CAN driver system settings.
+ */
+#define USE_STM32_CAN1              TRUE
+#define STM32_CAN1_IRQ_PRIORITY     11
+
+/*
+ * PWM driver system settings.
+ */
+#define USE_STM32_PWM1              TRUE
+#define USE_STM32_PWM2              FALSE
+#define USE_STM32_PWM3              FALSE
+#define USE_STM32_PWM4              FALSE
+#define STM32_PWM1_IRQ_PRIORITY     7
+#define STM32_PWM2_IRQ_PRIORITY     7
+#define STM32_PWM3_IRQ_PRIORITY     7
+#define STM32_PWM4_IRQ_PRIORITY     7
+
+/*
+ * SERIAL driver system settings.
+ */
+#define USE_STM32_USART1            FALSE
+#define USE_STM32_USART2            TRUE
+#define USE_STM32_USART3            FALSE
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define USE_STM32_UART4             FALSE
+#define USE_STM32_UART5             FALSE
+#endif
+#define STM32_USART1_PRIORITY       12
+#define STM32_USART2_PRIORITY       12
+#define STM32_USART3_PRIORITY       12
+#if defined(STM32F10X_HD) || defined(STM32F10X_CL)
+#define STM32_UART4_PRIORITY        12
+#define STM32_UART5_PRIORITY        12
+#endif
+
+/*
+ * SPI driver system settings.
+ */
+#define USE_STM32_SPI1              TRUE
+#define USE_STM32_SPI2              TRUE
+#define STM32_SPI1_DMA_PRIORITY     2
+#define STM32_SPI2_DMA_PRIORITY     2
+#define STM32_SPI1_IRQ_PRIORITY     10
+#define STM32_SPI2_IRQ_PRIORITY     10
+#define STM32_SPI1_DMA_ERROR_HOOK() chSysHalt()
index 7496e3b..8eb0798 100755 (executable)
@@ -23,7 +23,7 @@
 help=no
 target=OLIMEX_STM32_H103
 verbose=no
-with_dfu=no
+with_dfu=default
 debug=no
 
 # Process each option
@@ -68,6 +68,7 @@ Configuration:
                        supported targes are:
                           OLIMEX_STM32_H103
                           STM32_PRIMER2
+                          CQ_STARM
   --enable-debug       debug with virtual COM port     [no]
   --with-dfu           build image for DFU             [<target specific>]
 EOF
@@ -82,6 +83,18 @@ else
   exit 1
 fi
 
+# --with-dfu option
+case $target in
+CQ_STARM)
+  if test "$with_dfu" = "default"; then
+    with_dfu=yes;
+  fi  ;;
+*)
+  if test "$with_dfu" = "default"; then
+    with_dfu=no;
+  fi  ;;
+esac
+
 if test "$debug" = "yes"; then
   DEBUG_MAKE_OPTION="ENABLE_DEBUG=1"
   DEBUG_DEFINE="#define DEBUG 1"