2 * ST32F103 memory setup.
4 __main_stack_size__ = 0x0100; /* Exception handlers */
5 __process0_stack_size__ = 0x0400; /* main */
6 __process1_stack_size__ = 0x0100; /* led */
7 __process2_stack_size__ = 0x0200; /* rng */
8 __process3_stack_size__ = 0x0100; /* intr: usb */
9 __process4_stack_size__ = 0x0100; /* intr: adc dma */
13 flash0 : org = @ORIGIN@, len = 4k
14 flash : org = @ORIGIN@+0x1000, len = @FLASH_SIZE@k - 4k
15 ram : org = 0x20000000, len = @MEMORY_SIZE@k
18 /* __flash_start__: flash ROM start address regardless of DFU_SUPPORT */
19 __flash_start__ = 0x08001000;
20 __flash_end__ = ORIGIN(flash) + LENGTH(flash);
22 __ram_start__ = ORIGIN(ram);
23 __ram_size__ = LENGTH(ram);
24 __ram_end__ = __ram_start__ + __ram_size__;
30 .sys : ALIGN(4) SUBALIGN(4)
39 build/sys.o(.rodata.*)
48 .startup : ALIGN(128) SUBALIGN(128)
50 KEEP(*(.startup.vectors))
54 .text : ALIGN(16) SUBALIGN(16)
66 .ARM.extab : {*(.ARM.extab* .gnu.linkonce.armextab.*)} > flash
69 PROVIDE(__exidx_start = .);
70 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
71 PROVIDE(__exidx_end = .);
74 .eh_frame_hdr : {*(.eh_frame_hdr)} > flash
76 .eh_frame : ONLY_IF_RO {*(.eh_frame)} > flash
78 .textalign : ONLY_IF_RO { . = ALIGN(8); } > flash
86 __process4_stack_base__ = .;
87 . += __process4_stack_size__;
89 __process4_stack_end__ = .;
90 __process3_stack_base__ = .;
91 . += __process3_stack_size__;
93 __process3_stack_end__ = .;
94 __process2_stack_base__ = .;
95 . += __process2_stack_size__;
97 __process2_stack_end__ = .;
98 __process1_stack_base__ = .;
99 . += __process1_stack_size__;
101 __process1_stack_end__ = .;
102 __process0_stack_base__ = .;
103 . += __process0_stack_size__;
105 __process0_stack_end__ = .;
107 __main_stack_base__ = .;
108 . += __main_stack_size__;
110 __main_stack_end__ = .;
129 PROVIDE(_bss_start = .);
136 PROVIDE(_bss_end = .);
142 /* reGNUal is now relocatable, it's OK not using fixed address. */
147 . = ALIGN (@FLASH_PAGE_SIZE@);
148 } > flash =0xffffffff
151 __heap_base__ = _end;
152 __heap_end__ = __ram_end__;