add Olimex's
authorNIIBE Yutaka <gniibe@fsij.org>
Mon, 1 Oct 2012 07:13:35 +0000 (16:13 +0900)
committerNIIBE Yutaka <gniibe@fsij.org>
Mon, 1 Oct 2012 07:13:35 +0000 (16:13 +0900)
ChangeLog
boards/FST_01/board.h
boards/OLIMEX_STM32_H103/board.h
src/random.c

index 42f0994..9cef9c2 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,8 +1,12 @@
 2012-10-01  Niibe Yutaka  <gniibe@fsij.org>
 
-       * tool/neug_check.py: New.
-
        * src/random.c (adcgrpcfg): ADC1 and ADC2 two channels, each.
+       * boards/FST_01/board.h: Use default ADC settings.
+       * boards/OLIMEX_STM32_H103/board.h (NEUG_ADC_SETTING2_SMPR1)
+       (NEUG_ADC_SETTING2_SMPR2, NEUG_ADC_SETTING2_SQR3)
+       (NEUG_ADC_SETTING2_NUM_CHANNELS): Define.
+
+       * tool/neug_check.py: New.
        * src/main.c (neug_setup, USB_NEUG_GET_ERR_COUNT): New.
 
 2012-09-28  Niibe Yutaka  <gniibe@fsij.org>
index a81ed00..83a19cf 100644 (file)
 #define GPIO_LED       GPIOB_LED
 #define IOPORT_LED     GPIOB
 
-#define NEUG_ADC_SETTING1_SMPR1 ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_1P5) \
-                              | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_1P5)
-#define NEUG_ADC_SETTING1_SMPR2 0
-#define NEUG_ADC_SETTING1_SQR3  ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR)   \
-                              | ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT)
-#define NEUG_ADC_SETTING1_NUM_CHANNELS 2
-
-#define NEUG_ADC_SETTING2_SMPR1 0
-#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)    \
-                              | ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5)
-#define NEUG_ADC_SETTING2_SQR3  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0)      \
-                              | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN1)
-#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
+/* NeuG settings for ADC2 is default.  */
 
 /*
  * Board identifier.
index ce4b882..9b0de6f 100644 (file)
 #define GPIO_LED       GPIOC_LED
 #define IOPORT_LED     GPIOC
 
+/* NeuG settings for ADC2.  */
+#define NEUG_ADC_SETTING2_SMPR1 ADC_SMPR1_SMP_AN10(ADC_SAMPLE_1P5) \
+                              | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_1P5)
+#define NEUG_ADC_SETTING2_SMPR2 0
+#define NEUG_ADC_SETTING2_SQR3  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN10)   \
+                              | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN11)
+#define NEUG_ADC_SETTING2_NUM_CHANNELS 1
+
 /*
  * Board identifier.
  */
 
 /*
  * Port C setup.
- * PC0  - Push Pull output 50MHz.
- * PC1  - Push Pull output 50MHz.
+ * PC0  - Digital input with PullUp.  AN10
+ * PC1  - Digital input with PullUp.  AN11
  * Everything input with pull-up except:
  * PC6  - Normal input because there is an external resistor.
  * PC7  - Normal input because there is an external resistor.
  * PC11 - Open Drain output (USB disconnect).
  * PC12 - Push Pull output (LED).
  */
-#define VAL_GPIOCCRL            0x44888833      /*  PC7...PC0 */
+#define VAL_GPIOCCRL            0x44888888      /*  PC7...PC0 */
 #define VAL_GPIOCCRH            0x88837888      /* PC15...PC8 */
 #define VAL_GPIOCODR            0xFFFFFFFF
 
index 9c039d8..809c107 100644 (file)
 static Thread *rng_thread;
 #define ADC_DATA_AVAILABLE ((eventmask_t)1)
 
-/* Total number of channels to be sampled by a single ADC operation.*/
-#define ADC_GRP1_NUM_CHANNELS   1
-/* Depth of the conversion buffer, channels are sampled one time each.*/
+/* Depth of the conversion buffer.  */
 #define ADC_GRP1_BUF_DEPTH      256
 
+#define NEUG_ADC_SETTING1_SMPR1 ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_1P5) \
+                              | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_1P5)
+#define NEUG_ADC_SETTING1_SMPR2 0
+#define NEUG_ADC_SETTING1_SQR3  ADC_SQR3_SQ2_N(ADC_CHANNEL_SENSOR)   \
+                              | ADC_SQR3_SQ1_N(ADC_CHANNEL_VREFINT)
+#define NEUG_ADC_SETTING1_NUM_CHANNELS 2
+
+#if !defined(NEUG_ADC_SETTING2_SMPR1)
+#define NEUG_ADC_SETTING2_SMPR1 0
+#define NEUG_ADC_SETTING2_SMPR2 ADC_SMPR2_SMP_AN0(ADC_SAMPLE_1P5)    \
+                              | ADC_SMPR2_SMP_AN1(ADC_SAMPLE_1P5)
+#define NEUG_ADC_SETTING2_SQR3  ADC_SQR3_SQ1_N(ADC_CHANNEL_IN0)      \
+                              | ADC_SQR3_SQ2_N(ADC_CHANNEL_IN1)
+#define NEUG_ADC_SETTING2_NUM_CHANNELS 2
+#endif
+
+
 void adc2_init (void)
 {
   chSysLock ();
@@ -90,7 +104,7 @@ static void adc2_stop (void)
 /*
  * ADC samples buffer.
  */
-static adcsample_t samp[ADC_GRP1_NUM_CHANNELS * ADC_GRP1_BUF_DEPTH * 2];
+static adcsample_t samp[ADC_GRP1_BUF_DEPTH * 2];
  
 static void adccb (ADCDriver *adcp, adcsample_t *buffer, size_t n);
 static void adccb_err (ADCDriver *adcp, adcerror_t err);
@@ -98,17 +112,15 @@ static void adccb_err (ADCDriver *adcp, adcerror_t err);
 /*
  * ADC conversion group.
  * Mode: Dual fast interleaved mode.
- *   ADC1: master, 16 samples of 1 channels.
- *   ADC2: slave,  16 samples of 1 channels.
- * Channels:
- *   ADC1:
- *     IN10 (1.5 cycles sample time, port configured as push pull output 50MHz)
- *   ADC2:
- *     IN11 (1.5 cycles sample time, port configured as push pull output 50MHz)
+ *   ADC1: master.
+ *   ADC2: slave.
+ * Channels (default settings):
+ *   ADC1: two channels of SENSOR and VREF
+ *   ADC2: two channels of AN0 and AN1
  */
 static const ADCConversionGroup adcgrpcfg = {
   FALSE,
-  ADC_GRP1_NUM_CHANNELS,
+  1,          /* This is 1, even if NEUG_ADC_SETTING1_NUM_CHANNELS > 1.  */
   adccb,
   adccb_err,
   ADC_CR1_DUALMOD_2 | ADC_CR1_DUALMOD_1 | ADC_CR1_DUALMOD_0,